Senior Staff Power Performance Architect
d-MatrixVisit d-Matrix website
AI-infrastructure company producing memory-centric hardware, networking, and software for low-latency generative-AI inference in data centers.
Santa Clara, United States
Funding history
About d-Matrix
d-Matrix develops digital in-memory-compute technology and a full-stack inference platform comprising Corsair accelerators, JetStream networking accelerators, and Aviator software.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will own pre-silicon power estimation across RTL and physical design. You will create an architectural power-estimation tool, identify power activity windows, define performance monitoring requirements, lead micro-architecture and RTL work, and support power-performance verification and silicon bring-up.
Requirements
- 8+ years of experience in IC power or performance architecture, RTL, or physical design
- Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
- Knowledge of power, performance, micro-architecture, RTL, and physical design
- Knowledge of the full IC design flow
- Familiarity with an EDA power-estimation tool
- TCL and Python proficiency
- Experience with libraries, APIs, data parsing, and algorithms
Responsibilities
- Own RTL-level and physical-design-level pre-silicon power estimation
- Identify power activity windows and optimize power with RTL engineers
- Build an architectural power-estimation tool for AI workloads
- Define performance monitoring requirements and drive hardware improvements
- Lead micro-architecture, RTL design, synthesis, and power-performance verification
- Design power-saving and monitoring functions
- Participate in silicon bring-up and validation
Benefits
- Medical insurance
- Dental insurance
- Vision insurance
- 401k
- Equity
- Bonus