Senior Staff Front-End Engineer RISC Processor Integration
Bitdeer is a technology company providing Bitcoin mining solutions.
Maintainer signals as of 9/25/2026
Funding history
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About Bitdeer
Bitdeer provides full-spectrum Bitcoin mining and high-performance computing solutions, including SEALMINER mining equipment, Minerbase cooling containers, cloud mining, co-mining, mining management applications, mining rights marketplaces, and large-scale data center operations. The company also offers AI cloud infrastructure with GPU computing, model training and deployment capabilities, and turnkey AI data center solutions for enterprise customers and developers. Bitdeer is headquartered in Singapore and operates globally.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
Configure and integrate RISC processor IP into SoC platforms, customize processor features, develop RTL wrappers and system glue logic, integrate interconnects and interrupt controllers, support verification and system bring-up, resolve performance and power issues, and coordinate third-party IP integration.
Requirements
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
- Five or more years of experience in SoC design, processor integration, or semiconductor development
- Experience integrating RISC processors, particularly RISC-V, into complex SoC platforms
- Understanding of pipeline architecture, cache hierarchy, MMU, MPU, PMP, interrupt and exception handling, and debug architecture
- Experience with AMBA AXI4, AHB, and APB protocols
- Strong Verilog and SystemVerilog RTL design skills
- Experience with synthesis, lint, CDC analysis, and RTL quality checks
- Familiarity with SoC boot flow and firmware interaction
- Experience with VCS, Xcelium, Questa, Verdi, or equivalent tools
- Understanding of clock and reset architecture and low-power design
- Experience with third-party IP vendors and architecture specifications
Responsibilities
- Configure and integrate RISC processor IP into SoC platforms
- Customize processor features including cache, MMU/MPU, PMP, debug, interrupt controller, and privilege modes
- Integrate processor subsystems with AXI, AHB, and APB interconnects and interrupt controllers
- Develop RTL integration logic, wrappers, and system glue logic
- Collaborate with verification teams on test plans and simulation debugging
- Work with firmware and software teams on bootloader, BSP, and operating system bring-up
- Resolve system-level performance, power, and integration issues
- Review third-party IP documentation and coordinate IP integration
Benefits
- Attractive welfare benefits
- Inclusive and respectful work environment
- Networking opportunities with industry pioneers
- Opportunity to contribute to digital asset industry projects
- Personal accountability, autonomy, growth, and learning opportunities
- Training and mentoring