Senior/Staff Front-End Engineer (SOC)

Skills

About the Role

Implement Verilog RTL for SoC sections, collaborate with IP engineers on integration, support synthesis and physical design optimization, and contribute to verification, emulation, and debugging across pre-silicon and post-silicon stages.

Requirements

• Master’s degree preferred or Bachelor’s degree in Electrical Engineering or Computer Engineering.
• Five or more years of semiconductor or high-technology R&D experience appreciated.
• Verilog RTL development experience with industry-standard tools in an SoC environment.
• Strong understanding of SoC architecture and logic design.
• Strong problem-solving and debugging skills.
• Knowledge of clocking, reset sequences, power-up sequences, and power management.
• Exposure to verification methods.
• Comfort with Perl, Shell, or TCL scripting.
• Knowledge of emulation and FPGA prototyping preferred.

Responsibilities

• Implement Verilog RTL for various sections of an SoC.
• Work with IP engineers to integrate IPs into the SoC.
• Support synthesis, timing closure, power reduction, and floorplanning efforts.
• Contribute to design verification and emulation and assist with debugging across pre-silicon and post-silicon stages.

Benefits

• Authentic, diverse, and inclusive work environment.
• Opportunity to network with industry pioneers and enthusiasts.
• Opportunity to contribute directly to the digital asset industry.
• Involvement in new projects and process or system development.
• Personal accountability, autonomy, growth, and learning opportunities.
• Welfare benefits plus training and mentoring opportunities.