Functional Safety Architect
Velaura AI develops ultra-low-power silicon and software technologies for AI compute infrastructure.
Maintainer signals as of 8/28/2026
Funding history
About Velaura AI, Inc.
Velaura AI is an AI compute infrastructure company developing ultra-low-power silicon and software technologies. Its Titan Core™ platform uses proprietary digital chip IP, low-voltage libraries, EDA flows, and design methodologies to improve performance per watt in AI accelerators while maintaining performance, yield, and reliability. The company also applies this technology to Physical AI systems, including industrial robots, autonomous machines, drones, humanoids, and edge devices. Velaura engages hyperscalers, XPU companies, and developers of next-generation AI infrastructure and Physical AI solutions.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
Own the functional safety architecture for a Physical AI SoC, defining safety goals, mechanisms, fault handling, quantitative metrics, RTL and firmware requirements, safety cases, certification, audits, and cross-disciplinary processes.
Requirements
- 10+ years in functional safety or safety-critical hardware engineering.
- Experience taking silicon or embedded platforms through a full safety lifecycle.
- Deep expertise with ISO 26262 up to ASIL D and IEC 61508 up to SIL 3.
- Hands-on experience with HARA, FMEA/FMEDA, FTA, DFA, SPFM, LFM, and PMHF.
- Strong command of ECC, lockstep, BIST, redundancy, and safe-state design.
- Experience with RTL, silicon design, firmware, and low-level platform software.
- Ability to build and defend a safety case across multidisciplinary teams.
- Bachelor’s or advanced degree in a related engineering or computer science field, or equivalent experience.
- Excellent written and verbal communication skills.
- Experience with functional safety for AI/ML accelerators or NPUs.
- Familiarity with SOTIF and safety-critical domains.
- Experience interfacing with certification bodies or assessors.
Responsibilities
- Own the SoC functional safety architecture.
- Define safety goals, safety mechanisms, and hardware/software fault handling.
- Lead HARA, DFMEA, FMEDA, FTA, and dependent-failure analysis.
- Derive quantitative safety metrics and diagnostic-coverage targets.
- Define safety mechanisms for compute, AI/NPU, memory, and interconnect.
- Embed safety requirements into RTL, boot flows, and SDKs.
- Own safety cases and work products across the safety lifecycle.
- Coordinate with assessors and customers on certification and audits.
- Establish functional safety processes, standards, and design practices.
- Manage interfaces between functional safety, cybersecurity, reliability, and SOTIF.
Benefits
- Performance-based incentives
- Equity participation
- Medical coverage
- Dental coverage
- Vision coverage
- Paid time off
- Flexible work arrangements
- Professional development opportunities