System IP Design Engineer
TenstorrentVisit Tenstorrent website
Tenstorrent is an AI-computing company that sells AI hardware and licenses AI and RISC-V intellectual property.
Toronto, Canada
Funding history
Investors
About Tenstorrent
Tenstorrent builds computers for AI, including AI processors, scalable server systems, and open-source software and compiler tooling. It also licenses AI and RISC-V IP for customers building customized silicon.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will own microarchitecture definition and RTL development for power management, interrupt controller, AXI interconnect, and cache-controller IP. You will work through verification closure, debug, synthesis, timing, power optimization, and design-for-power checks.
Requirements
- 5–10 years of ASIC, SoC, or IP design experience
- Experience in microarchitecture and RTL development
- Verilog and SystemVerilog proficiency
- Understanding of clocking, reset, DVFS, and low-power modes
- Knowledge of RISC-V or ARM-based SoCs
- Knowledge of AXI, AHB, APB, and CHI protocols
- Awareness of ISO 26262 practices
- Experience with LINT, CDC/RDC, power-intent checks, Verdi, NCSIM, and power-estimation tools
- Eligibility to access U.S. export-controlled technology
Responsibilities
- Own microarchitecture definition and RTL development for system IP
- Design and optimize power-management, interrupt-controller, AXI-interconnect, and cache-controller IP
- Drive verification closure, performance debug, synthesis, timing, and power optimization
- Design IP blocks for caches, memory subsystems, interconnects, and NoCs
- Perform LINT, CDC/RDC, and power-intent checks
- Apply design-for-power, debug, and test methodologies