IP Design Engineer
South Korean AI semiconductor and infrastructure company building inference accelerators, servers, racks, and software for production-scale AI deployment.
Funding history
Investors
About Rebellions
Rebellions develops purpose-built AI inference hardware and an accompanying software stack. Its current offerings include the Rebel100 accelerator and deployable RebelServer, RebelRack, and RebelPOD systems, designed for energy-efficient data-center inference.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will define architectures and implement RTL for AI acceleration IPs and core SoC components. You will coordinate with verification, SoC integration, software, and DSP engineers, optimize hardware implementations of specialized algorithms, and participate in silicon bring-up and hardware debugging.
Requirements
- At least 3 years of RTL design experience using SystemVerilog or Verilog
- Experience from architecture definition through RTL implementation
- Proficiency with VCS or Xcelium logic simulation tools and RTL debugging
- Experience with Lint, CDC, DFT, and synthesis flows
Responsibilities
- Define architecture and implement RTL for AI acceleration IPs and SoC components
- Coordinate with verification, SoC integration, and software functions
- Collaborate with DSP engineers to optimize hardware implementation of specialized algorithms
- Participate in silicon bring-up and hardware debugging
Hiring Process
Document screening → online interview → onsite interview → culture-fit interview → compensation discussion → final acceptance