CPU Microarchitect Vector and Matrix Compute
Tenstorrent is an AI-computing company that sells AI hardware and licenses AI and RISC-V intellectual property.
Funding history
Investors
About Tenstorrent
Tenstorrent builds computers for AI, including AI processors, scalable server systems, and open-source software and compiler tooling. It also licenses AI and RISC-V IP for customers building customized silicon.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will define the architecture and microarchitecture of CPU compute execution units and subsystems for RISC-V vector, floating-point, and matrix extensions. You will translate HPC and AI workload requirements into scalable designs that optimize performance, power, and area, working across hardware and software boundaries through silicon implementation.
Requirements
- 5+ years of CPU design experience for high-performance computing and AI acceleration
- Experience designing hardware for matrix floating-point computation, AI accelerators, vector processing, tensor engines, or machine learning workloads
- Knowledge of CPU architecture, memory hierarchy, data movement, cache coherency, and CPU-to-accelerator interactions
- Experience defining architectural specifications and leading cross-functional teams through silicon implementation
- Experience with RTL development using cutting-edge AI frontier models
- Eligibility to access U.S. export-controlled technology
Responsibilities
- Define CPU architecture and microarchitecture for vector, floating-point, and matrix compute extensions
- Translate HPC and AI workload requirements into scalable CPU architectures
- Optimize compute architectures for performance, power, and area
- Define architectural specifications and lead work from concept through silicon implementation
- Work with architects, software teams, silicon designers, and external IP partners