Top Level Physical Design Engineer
Tenstorrent is an AI-computing company that sells AI hardware and licenses AI and RISC-V intellectual property.
Funding history
Investors
About Tenstorrent
Tenstorrent builds computers for AI, including AI processors, scalable server systems, and open-source software and compiler tooling. It also licenses AI and RISC-V IP for customers building customized silicon.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will drive top-level implementation for complex AI and CPU system-on-chip designs. You will develop floorplans, power grids, and clock networks; manage chip-level design closure; and collaborate with architecture, RTL, and packaging stakeholders. You will optimize implementations for power, performance, area, and schedule.
Requirements
- 8+ years of top-level SoC physical design experience on complex multi-million-gate designs
- Expertise in hierarchical floorplanning, fabric implementation, power grid design, and global clock distribution
- Experience with bump planning, RDL implementation, and multi-voltage domain designs
- Mastery of timing closure, EM/IR analysis, and chip-level physical verification
- Eligibility to access U.S. export-controlled technology
Responsibilities
- Drive top-level implementation of AI and CPU system-on-chip designs
- Develop hierarchical floorplans, power grids, and clock networks
- Drive chip-level timing closure, EM/IR analysis, and physical verification
- Optimize chip implementations for power, performance, and area
- Collaborate with architecture, RTL, and packaging teams
Hiring Process
Candidates will be assessed during the interview process for the appropriate level; offers will align with that level.