Senior/Staff Front-End Engineer (SOC)
Bitdeer is a NASDAQ-listed company specializing in Bitcoin mining, AI cloud services, and data center operations. They provide comprehensive mining solutions, AI development services, and operate seven global data centers with a significant portion of their energy being carbon-free.
About Bitdeer Technologies Group
Bitdeer is a high-performance computing platform that specializes in Bitcoin mining and AI cloud services. The company constructs and operates numerous cutting-edge data centers globally, including one of North America's largest, with a focus on using clean energy. Their product offerings include SEALMINER, which are high-performance and efficient chips; Cloud Mining services that allow users to participate in mining remotely; and Minerbase, a mobile intelligent cooling system. In addition to their crypto-focused services, Bitdeer is expanding into the AI sector by providing high-performance computing for AI/ML acceleration using NVIDIA DGX H100s, offering turnkey AI datacenter solutions, and developing an end-to-end AI application sharing ecosystem. They cater to both individual and institutional clients with a range of services like after-sales support, a hash rate market, and data center support.
Skills
About the Role
You will implement Verilog RTL for various sections of an SoC, working closely with IP engineers to integrate IPs into the overall design. You'll support synthesis, timing closure, power reduction, and floorplanning efforts aimed at optimizing performance and efficiency. You will also contribute to design verification and emulation, helping debug issues that arise across both pre-silicon and post-silicon stages.
Requirements
- Master's degree (preferred) or Bachelor's degree in Electrical Engineering or Computer Engineering with 5 years or more in a semiconductor or high technology R&D experience would be appreciated
- Verilog RTL development experience with industry-standard tools in an SoC environment
- Strong understanding of SoC architecture and logic design
- Strong problem-solving and debugging skills
- Knowledge of clocking, reset sequences, power-up sequences, and power management
- Exposure to verification methods
- Comfort with scripting languages (Perl, Shell, TCL) to automate design tasks
- Knowledge of emulation and FPGA prototyping is preferred
Responsibilities
- Implement Verilog RTL for various sections of SoC
- Work with IP engineers to integrate IPs to the SoC
- Support synthesis, timing closure, power reduction, and floorplanning efforts to optimize performance and efficiency
- Contribute to design verification & emulation and assist in debugging issues across pre-silicon and post-silicon stages