Senior Product Test and Yield Enhancement Engineer

Cerebras builds wafer-scale AI computing systems and a cloud inference platform for training, fine-tuning, and serving AI models.

Sunnyvale, California, United States
About Cerebras Systems, Inc.

Cerebras Systems is an AI-infrastructure company founded in 2015. It sells rack-scale wafer-scale computing systems and provides cloud-based, API-accessible AI inference alongside on-premises deployments.

View jobs by Cerebras Systems, Inc.

Skills

Candidate Availability

Required and preferred rules are kept separate and reflect the wording in the original posting.

About the Role

You will develop and optimize production test programs for wafer-scale AI processors. You will drive manufacturing testing, implement design-for-test methods, analyze test and defect data, improve yield, isolate failures, optimize operating limits, and support wafer and lot disposition decisions.

Requirements

  • 10+ years of semiconductor product or test-engineering experience.
  • Experience in semiconductor testing, failure analysis, and yield enhancement.
  • Experience in test development, silicon debug, test optimization, and yield improvement.
  • Experience testing parallel processors, GPUs, CPUs, or networking ASICs with memory.
  • Hands-on experience with the Advantest V93000 platform.
  • Experience designing, developing, and debugging load boards and probe cards.
  • Experience with Git-based development and release flows.

Responsibilities

  • Develop and optimize production test programs for wafer-scale AI processors.
  • Drive high-volume manufacturing testing with foundries and OSATs.
  • Implement and optimize scan, BIST, ATPG, and functional test strategies.
  • Analyze ATE, Shmoo, parametric, and defect data to improve yield and fault tolerance.
  • Develop failure-analysis and fault-isolation methods.
  • Build wafer-level test flows for parallel compute and interconnect architectures.
  • Optimize voltage-frequency limits, current, thermal behavior, power delivery, and parallel die testing.
  • Support wafer and lot disposition decisions.