Senior Engineer SoC Design Verification
TenstorrentVisit Tenstorrent website
Tenstorrent is an AI-computing company that sells AI hardware and licenses AI and RISC-V intellectual property.
Toronto, Canada
Funding history
Investors
About Tenstorrent
Tenstorrent builds computers for AI, including AI processors, scalable server systems, and open-source software and compiler tooling. It also licenses AI and RISC-V IP for customers building customized silicon.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will lead pre-silicon verification for compute, DDR memory, and Fabric NoC subsystems. You will build scalable verification environments, execute system-level tests, close coverage gaps, debug failures, automate flows, and mentor engineers.
Requirements
- Expertise in UVM, SystemVerilog, coverage-driven verification, assertions, and subsystem-level debugging.
- Experience verifying compute subsystems, DDR controllers, PHY-facing logic, NoC protocols, coherency, ordering, and data movement.
- Knowledge of reset, power management, error handling, performance, and high-concurrency scenarios.
- Familiarity with Python, C/C++, Tcl, CocoTB, or similar verification automation tools.
- Eligibility to access U.S. export-controlled technology.
Responsibilities
- Develop and own scalable verification environments for compute, DDR, and Fabric NoC subsystems.
- Write and execute tests for compute operations, memory traffic, coherency, routing, ordering, QoS, power management, and error handling.
- Analyze coverage gaps, debug failures, and drive root-cause analysis.
- Drive verification planning, regression quality, coverage closure, and signoff.
- Automate verification flows using scripting and reusable infrastructure.
- Mentor engineers and improve verification methodology.