Senior Director, CAD & Design Methodology

Skills

About the Role

You will architect and own Velaura's end-to-end ASIC development methodology, spanning everything from the first line of RTL through physical implementation, signoff, packaging integration, and tapeout. You'll establish scalable, reproducible design flows across RTL, verification, synthesis, DFT, physical design, STA, physical verification, release management, and silicon bring-up support. You'll lead the evaluation, selection, deployment, and integration of best-in-class EDA tools across multiple vendors, and define the company's engineering infrastructure strategy covering compute, storage, networking, cloud resources, job scheduling, security, and disaster recovery. You'll build automation frameworks, CI/CD pipelines, regression systems, dashboards, and workflows to continually improve productivity and design quality. You'll own EDA licensing strategy, vendor relationships, procurement, budgets, IP administration, and license compliance, while partnering closely with architecture, RTL, verification, physical design, packaging, software, and IT teams to remove friction and accelerate execution. You'll also build, mentor, and scale a world-class CAD and methodology organization.

Requirements

• Deep understanding of the complete ASIC development lifecycle, from architecture and RTL through tapeout
• Experience developing and owning design methodologies across multiple successful SoC programs
• Hands-on experience with EDA ecosystems from multiple vendors such as Synopsys, Cadence, Siemens EDA, Ansys, and related tools
• Strong understanding of engineering compute infrastructure, distributed scheduling, storage systems, cloud environments, and license management
• Excellent scripting and automation skills using Python, Tcl, Bash, or similar
• Strong knowledge of version control, continuous integration, regression management, and reproducible engineering practices
• Ability to make sound technical and business decisions involving tools, infrastructure, budgets, licensing, and engineering investment
• Exceptional organizational and leadership skills
• Excellent communication skills and ability to influence senior technical leaders across disciplines

Responsibilities

• Architect and own the end-to-end ASIC development methodology from RTL through tapeout
• Establish scalable reproducible design flows across RTL, verification, synthesis, DFT, physical design, STA, physical verification, release management, and silicon bring-up
• Lead evaluation, selection, deployment, and integration of EDA tools across multiple vendors
• Define engineering infrastructure strategy including compute, storage, networking, cloud resources, job scheduling, security, backup, and disaster recovery
• Build automation frameworks, CI/CD pipelines, regression systems, dashboards, and engineering workflows
• Own EDA licensing strategy, vendor relationships, procurement, budgets, IP administration, and license compliance
• Partner with architecture, RTL, verification, physical design, packaging, software, and IT teams
• Build, mentor, and scale a CAD and methodology organization

Benefits

• Medical coverage
• Dental coverage
• Vision coverage
• Paid time off
• Flexible work arrangements
• Equity participation