Security Architect
Velaura AI develops ultra-low-power silicon and software technologies for AI compute infrastructure.
Funding history
About Velaura AI, Inc.
Velaura AI is an AI compute infrastructure company developing ultra-low-power silicon and software technologies. Its Titan Core™ platform uses proprietary digital chip IP, low-voltage libraries, EDA flows, and design methodologies to improve performance per watt in AI accelerators while maintaining performance, yield, and reliability. The company also applies this technology to Physical AI systems, including industrial robots, autonomous machines, drones, humanoids, and edge devices. Velaura engages hyperscalers, XPU companies, and developers of next-generation AI infrastructure and Physical AI solutions.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will own end-to-end security architecture for Physical AI SoCs from early architecture through tape-out and production. You will define hardware roots of trust, secure boot, key management, secure debug, lifecycle controls, and protection for AI workloads. You will lead threat modeling, establish security standards, support assurance activities, and mentor engineers.
Requirements
- 10+ years of experience in security engineering or architecture
- Experience defining hardware or SoC security for shipping silicon or embedded platforms
- Expertise in hardware security primitives, including root of trust, secure boot, trusted execution environments, key management, secure debug, and cryptographic implementations
- Applied cryptography
- Knowledge of physical and side-channel attacks, including fault injection and power or EM analysis, and countermeasures
- Experience with SoC development flows across RTL, silicon design, firmware, and low-level platform software
- Threat modeling
- Master’s degree in Electrical or Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- Written and verbal communication
- Technical leadership
- Mentoring
Responsibilities
- Own the SoC security architecture, including hardware root of trust, secure boot, key management, secure debug, and lifecycle and provisioning strategy
- Architect protection for AI workloads and sensitive on-chip assets, including model confidentiality, model integrity, secure AI and NPU execution, memory isolation, trusted execution environments, and cryptographic acceleration
- Lead threat modeling and security risk assessments for SoC subsystems
- Translate physical, side-channel, fault-injection, and supply-chain threats into hardware and firmware requirements
- Embed security requirements into RTL, boot flows, and SDKs and review implementations against the architecture
- Define secure updates, attestation, and device identity approaches
- Establish security architecture standards, review processes, and design practices
- Support certification, audit, and customer security-assurance efforts
- Mentor engineers
Benefits
- Equity compensation
- Medical coverage
- Dental coverage
- Vision coverage
- Paid time off
- Flexible work arrangements