Physical Engineering Engineer
FuriosaAIVisit FuriosaAI website
FuriosaAI is a South Korean AI semiconductor company building energy-efficient inference accelerators, servers, and software for enterprise and cloud AI deployments.
Seoul, South Korea
Funding history
Investors
About FuriosaAI
FuriosaAI develops the RNGD AI inference accelerator and NXT RNGD Server, alongside a software toolchain for compiling, optimizing, and deploying LLM and agentic-AI workloads.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will evaluate power, performance, and area during chip architecture planning. You will perform logic synthesis, equivalence checking, SDC and UPF development, and static timing analysis. You will work with a design house to achieve implementation goals.
Requirements
- Bachelor’s degree in Electronic Engineering or a related technical field
- Experience using Verilog HDL for digital logic design
- 2+ years of industry experience in logic synthesis, LEC, STA, SDC, and UPF
- Experience with Synopsys tools including DC, FM, and PT
- Experience with TCL and shell scripting
- ASIC design experience
- DFT experience
- Place and route experience
- Experience with high-speed connectivity IPs such as PCIe, Ethernet, and HBM
Responsibilities
- Evaluate power, performance, and area for chip architecture planning
- Perform synthesis, logic equivalence checking, SDC and UPF development, and static timing analysis
- Collaborate with a design house to achieve implementation outcomes