Mid Core Design Verification Engineer
Tenstorrent is an AI-computing company that sells AI hardware and licenses AI and RISC-V intellectual property.
Funding history
Investors
About Tenstorrent
Tenstorrent builds computers for AI, including AI processors, scalable server systems, and open-source software and compiler tooling. It also licenses AI and RISC-V IP for customers building customized silicon.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will verify next-generation high-performance RISC-V CPU cores. You will develop verification strategies, test plans, and testbenches; create constrained-random tests, assertions, and coverage; debug RTL and simulation failures; and drive issues through resolution. You will work across CPU architecture, microarchitecture, RTL, and software to identify important corner cases.
Requirements
- 6+ years of design-verification experience for CPUs, SoCs, ASICs, or other complex digital designs
- SystemVerilog and UVM experience, including testbench development, constrained-random testing, assertions, and functional coverage
- Understanding of CPU architecture or microarchitecture
- Experience debugging RTL and simulation failures using waveforms and simulation/debug tools
- C, C++, or Python skills
Responsibilities
- Develop verification strategies, test plans, and testbenches for RISC-V CPU cores
- Build constrained-random tests, assertions, and functional coverage
- Debug RTL and simulation failures
- Identify corner cases in out-of-order processor designs
- Drive verification issues to closure
- Work with architects, RTL designers, software engineers, and verification engineers