Design Verification Engineer AI Accelerator

Velaura AI develops ultra-low-power silicon and software technologies for AI compute infrastructure.

Santa Clara, USA
About Velaura AI, Inc.

Velaura AI is an AI compute infrastructure company developing ultra-low-power silicon and software technologies. Its Titan Core™ platform uses proprietary digital chip IP, low-voltage libraries, EDA flows, and design methodologies to improve performance per watt in AI accelerators while maintaining performance, yield, and reliability. The company also applies this technology to Physical AI systems, including industrial robots, autonomous machines, drones, humanoids, and edge devices. Velaura engages hyperscalers, XPU companies, and developers of next-generation AI infrastructure and Physical AI solutions.

View jobs by Velaura AI, Inc.

Skills

Candidate Availability

Required and preferred rules are kept separate and reflect the wording in the original posting.

About the Role

You will own verification of custom AI acceleration units, including matrix and vector compute engines. You will build test and coverage plans, develop reference models, verify numerical behavior and data flow, evaluate performance, and support emulation and pre-silicon bring-up.

Requirements

  • 8 or more years verifying high-performance compute or complex digital designs
  • LLM architecture and inference data flow
  • GEMM and GEMV operations
  • SystemVerilog
  • UVM
  • C
  • C++
  • Assertions
  • Coverage-driven verification
  • Reference models in C, C++, or Python
  • FP16
  • BF16
  • FP8
  • INT8
  • Verification ownership from test plan through coverage closure

Responsibilities

  • Own verification of custom AI acceleration units
  • Create detailed test and coverage plans for numerical hardware
  • Build verification environments using SystemVerilog, UVM, C, and C++
  • Develop GEMM and GEMV reference models and compare hardware results
  • Verify accelerator data flow, operand staging, tiling, accumulation, and writeback
  • Verify precision, rounding, and quantization behavior
  • Verify throughput, latency, utilization, and performance per watt
  • Execute regressions and track bug and coverage metrics
  • Support emulation and pre-silicon bring-up with compiler and runtime teams

Benefits

  • Competitive equity compensation
  • Medical coverage
  • Dental coverage
  • Vision coverage
  • Paid time off
  • Flexible work arrangements