DFT Engineer
Tenstorrent is an AI-computing company that sells AI hardware and licenses AI and RISC-V intellectual property.
Funding history
Investors
About Tenstorrent
Tenstorrent builds computers for AI, including AI processors, scalable server systems, and open-source software and compiler tooling. It also licenses AI and RISC-V IP for customers building customized silicon.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will handle Design for Test for high-performance AI/ML chip designs, covering all implementation aspects from RTL to tapeout across multiple IPs. You will implement DFT features, own ATPG and coverage analysis, plan and verify MBIST, and refine DFx flows that balance coverage, test cost and design intrusion.
Requirements
- BS/MS/PhD in EE/ECE/CE/CS
- 5+ years of industry experience in DFx/DFT for complex ASIC/SoC designs
- Fluent in Verilog RTL for DFT logic and comfortable with SystemVerilog/UVM
- Hands-on experience with ATPG and DFx insertion tools, fault models, and low-power design flows
- Strong debug and problem-solving skills
- Eligibility to access U.S. export-controlled technology
Responsibilities
- Implement and integrate DFT features (scan, JTAG, compression, ASST, MBIST) into RTL from early design through tapeout
- Own ATPG, test coverage analysis, and gate-level simulation to maintain high-quality coverage
- Plan, implement, and verify MBIST
- Work with Test Engineering on test planning, pattern delivery, and debug
- Develop and refine DFx flows and methodology integrating with front-end and physical design flows