Design Verification Engineer – Physical AI Compute
Velaura AI develops ultra-low-power compute technology for cloud, edge, and physical AI applications. It also offers Teraflux Bitcoin mining hardware, fleet-management software, and related support for mining operators.
Maintainer signals as of 8/14/2026
Funding history
About Velaura AI
Velaura AI is a semiconductor and technology company that provides patented ultra-low-power silicon design technology, IP, toolflows, and custom chiplet solutions for AI compute platforms. Its customers include hyperscaler and XPU companies seeking reduced power consumption and higher compute efficiency. The company also builds Teraflux Bitcoin mining products, including air-, hydro-, and immersion-cooled miners, ASICs, modular containers, miner firmware, fleet-management software, and enterprise customer support.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You develop and execute verification strategies for complex SoC components and systems. You build SystemVerilog and UVM verification environments, define coverage goals, verify hardware and software interactions, analyze performance and real-time behavior, develop assertions and checkers, participate in emulation and FPGA prototyping, and debug issues across hardware and software boundaries.
Requirements
- Experience verifying complex digital systems
- Strong analytical and problem-solving skills
- Understanding of computer architecture, microarchitecture, SoC architecture, and digital design fundamentals
- Experience with SystemVerilog, UVM, C/C++, assertions, and coverage-driven verification
- Familiarity with formal verification techniques and tools
- Understanding of memory systems, interconnect fabrics, caches, DMA engines, processors, or accelerator architectures
- Experience debugging complex system-level issues
- Ability to work effectively in a collaborative multidisciplinary engineering environment
- Experience with functional safety standards such as ISO 26262, IEC 61508, IEC 61511, or ISO 13849
- Experience with AI, machine learning, or edge AI hardware
- Familiarity with robotics, drones, autonomous vehicles, or industrial automation systems
- Experience verifying QoS, latency-sensitive, or real-time systems
- Experience with hardware-software co-verification and system-level validation
Responsibilities
- Develop and execute verification strategies for key portions of the SoC
- Build verification environments using SystemVerilog, UVM, C/C++, assertions, formal verification, and emulation
- Define verification plans, coverage goals, and correctness criteria with architects and RTL engineers
- Verify compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, and other SoC infrastructure
- Perform hardware-software co-verification involving firmware, drivers, runtime software, and operating system interactions
- Verify performance, latency, bandwidth, QoS, and real-time behavior under representative workloads
- Develop assertions, checkers, scoreboards, and automated verification infrastructure
- Participate in emulation, FPGA prototyping, and pre-silicon software bring-up
- Investigate bugs, perform root-cause analysis, and debug across hardware and software boundaries
- Perform post-silicon debug and root-cause analysis
- Use AI-assisted verification workflows to improve productivity, quality, and coverage
- Contribute to continuous improvement
Benefits
- Medical coverage
- Dental coverage
- Vision coverage
- Paid time off
- Flexible work arrangements
- Equity participation
- Performance-based incentives