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RTL Designer – Physical AI Compute

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Velaura AI

Velaura AI develops ultra-low-power compute technology for cloud, edge, and physical AI applications. It also offers Teraflux Bitcoin mining hardware, fleet-management software, and related support for mining operators.

Santa Clara, USA
About Velaura AI

Velaura AI is a semiconductor and technology company that provides patented ultra-low-power silicon design technology, IP, toolflows, and custom chiplet solutions for AI compute platforms. Its customers include hyperscaler and XPU companies seeking reduced power consumption and higher compute efficiency. The company also builds Teraflux Bitcoin mining products, including air-, hydro-, and immersion-cooled miners, ASICs, modular containers, miner firmware, fleet-management software, and enterprise customer support.

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Skills

Candidate Availability

Required and preferred rules are kept separate and reflect the wording in the original posting.

About the Role

You will design and optimize RTL for key portions of a Physical AI SoC. You will develop microarchitectures, define hardware interfaces and execution flows, contribute to compute and memory subsystems, optimize performance, power, and area, and collaborate through verification and physical design.

Requirements

  • Experience designing RTL for complex digital systems
  • Strong understanding of computer architecture, microarchitecture, and digital design fundamentals
  • Experience with Verilog and SystemVerilog
  • Familiarity with performance, power, and area tradeoffs
  • Understanding of memory systems, interconnects, caches, DMA engines, or accelerator architectures
  • Experience with hardware/software co-design and system-level performance optimization
  • Strong debugging and problem-solving skills

Responsibilities

  • Design, implement, and optimize RTL for key SoC components
  • Develop robust and efficient microarchitectures
  • Define hardware interfaces, execution flows, and memory hierarchies
  • Contribute to compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, and power-management logic
  • Optimize designs for performance, power, area, scalability, and reliability
  • Analyze performance bottlenecks and propose improvements
  • Participate in design reviews

Benefits

  • Performance-based incentives
  • Equity participation
  • Medical coverage
  • Dental coverage
  • Vision coverage
  • Paid time off
  • Flexible work arrangements