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FPGA Engineer

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Virtu Financial

Stealth

Distributed
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Skills

Candidate Availability

Required and preferred rules are kept separate and reflect the wording in the original posting.

About the Role

You will work on FPGA and ASIC solutions for ultra-low-latency trading systems across the full design lifecycle, including architecture, RTL implementation, simulation, verification, and bring-up on live hardware. You will solve real engineering problems with guidance from experienced engineers and senior mentors.

Requirements

  • Academic background in Electrical or Computer Engineering
  • Experience with SystemVerilog or Verilog
  • Experience with FPGA vendor tools such as Vivado or Quartus
  • Programming experience in Python, C++, or a similar language
  • Interest in FPGA and ASIC applications in low-latency trading systems
  • Strong problem-solving skills
  • Strong communication skills
  • Graduating in 2028

Responsibilities

  • Design FPGA and ASIC solutions
  • Develop architectures and RTL implementations
  • Perform simulation and verification
  • Bring up designs on live hardware
  • Solve real engineering problems in low-latency trading systems

Benefits

  • Daily catered lunches
  • Fully stocked kitchen
  • On-site gym
  • Workout classes
  • Games room
  • Social events
  • Laundry service