Research Engineer Chip Design RL
AI safety and research company building reliable, interpretable, and steerable AI systems, including the Claude product family and developer platform.
Funding history
About Anthropic
Anthropic PBC develops frontier AI systems and deploys them through Claude products and the Claude Platform, with a stated focus on safety, interpretability, and steerability.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will design and implement reinforcement learning environments and evaluations for RTL generation, verification, and physical-design optimization. You will improve EDA-tool latency and proxy rewards, conduct experiments, shape the roadmap, deliver work into training runs, and collaborate across research and engineering.
Requirements
- Expertise in ASIC or FPGA design
- Knowledge of RTL, design verification, physical design, PPA optimization, DFT, and ECOs
- Fluency with EDA tools and processes
- Experience taking chips from specification to silicon
- Ability to balance research exploration with engineering implementation
Responsibilities
- Design and implement reinforcement learning environments and evaluations for RTL generation, verification, and physical-design optimization
- Optimize EDA-tool latency and proxy rewards
- Conduct experiments and shape the roadmap
- Deliver work into research and production training runs
- Collaborate with researchers and engineers
Benefits
- Visa sponsorship efforts
- Optional equity donation matching
- Generous vacation
- Parental leave
- Flexible working hours