Principal AI SoC Runtime Software Architect
Velaura AI develops ultra-low-power compute technology for cloud, edge, and physical AI applications. It also offers Teraflux Bitcoin mining hardware, fleet-management software, and related support for mining operators.
Maintainer signals as of 8/14/2026
Funding history
About Velaura AI
Velaura AI is a semiconductor and technology company that provides patented ultra-low-power silicon design technology, IP, toolflows, and custom chiplet solutions for AI compute platforms. Its customers include hyperscaler and XPU companies seeking reduced power consumption and higher compute efficiency. The company also builds Teraflux Bitcoin mining products, including air-, hydro-, and immersion-cooled miners, ASICs, modular containers, miner firmware, fleet-management software, and enterprise customer support.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will own the software architecture for a heterogeneous AI SoC and define the end-to-end runtime across sensor ingest, preprocessing, AI inference, postprocessing, and application delivery. You will coordinate workloads and data movement across CPU cores, AI accelerators, vision and multimedia engines, and embedded processors. You will establish memory-sharing, synchronization, API, observability, resilience, and recovery architectures while providing hands-on technical leadership across runtime, kernel, driver, firmware, multimedia, and SDK development.
Requirements
- Extensive experience designing and building production runtime systems, embedded middleware, multimedia frameworks, or performance-critical systems software
- Strong C/C++ programming skills
- Experience architecting production runtime software across application-facing APIs, user-space libraries, drivers, firmware, and hardware interfaces
- Understanding of heterogeneous and asynchronous execution, command submission, queues, events, dependencies, synchronization, concurrency, scheduling, and resource management
- Understanding of device memory, DMA, IOMMU/SMMU, cache coherency, memory mapping, shared buffers, buffer lifetimes, and kernel/user-space memory interfaces
- Experience optimizing data movement and execution across multiple hardware engines
- Experience designing stable runtime APIs with compatibility, versioning, error handling, diagnostics, and recovery behavior
- Ability to debug cross-layer correctness and performance problems using profiling and tracing
- Technical leadership across component and organizational boundaries
Responsibilities
- Define the SoC-wide execution model for coordinating workloads across heterogeneous compute and media engines
- Set the architecture and technical direction for the AI inference runtime
- Own the end-to-end dataflow architecture for sensor-to-application pipelines
- Define the SoC-wide memory and buffer-sharing architecture across user space, the kernel, and hardware engines
- Define interface contracts among the runtime, kernel drivers, firmware, and hardware engines
- Partner with the compiler team to define the compiler-runtime contract
- Establish system-wide observability and performance architecture
- Define runtime resilience and validation architecture
Benefits
- Medical coverage
- Dental coverage
- Vision coverage
- Paid time off
- Flexible work arrangements