Post Silicon Validation Engineer

Skills

About the Role

You will validate high-performance AI chips and platforms from FPGA and emulator stages through first silicon. You will develop bare-metal C/C++ tests, Python automation and regression suites, debug failures, analyze results, improve validation infrastructure, collaborate across engineering disciplines, and provide technical guidance to other engineers.

Requirements

• Strong experience in bare-metal or embedded C/C++
• Good knowledge of digital ASICs
• Experience with post-silicon validation in digital ASIC environments
• Python and Linux knowledge
• Ability to work across teams and programming languages to find root causes
• Excellent communication, problem-solving, analytical and diagnostic skills
• Driver-level experience with PCIe, Ethernet, memory technologies or other peripherals is desirable
• Knowledge of mixed-signal building blocks and communication protocols is desirable
• Experience with Arm CPUs, system IP, debug tools and AMBA protocols is desirable

Responsibilities

• Plan, design, develop and debug silicon validation tests in bare-metal C/C++
• Deploy and debug silicon validation tests on first silicon
• Develop Python automation frameworks and regression test suites
• Collaborate with engineers from multiple disciplines
• Implement best practices and continuous improvements to test methodologies
• Analyze test results and debug failures and defects
• Contribute to shared test and validation infrastructure
• Provide feedback to architects
• Lead, mentor and provide technical guidance to engineering team members

Benefits

• Flexible working
• Generous annual leave
• Private medical insurance
• Health cash plan
• Dental plan
• Pension matched up to 5%
• Life assurance
• Income protection
• Generous parental leave
• Employee assistance programme
• Healthy food and snacks
• On-site barista bar