Hardware Silicon Validation Engineer NPU SoC
FuriosaAI is a South Korean AI semiconductor company building energy-efficient inference accelerators, servers, and software for enterprise and cloud AI deployments.
Funding history
Investors
About FuriosaAI
FuriosaAI develops the RNGD AI inference accelerator and NXT RNGD Server, alongside a software toolchain for compiling, optimizing, and deploying LLM and agentic-AI workloads.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will lead first-silicon bring-up for NPU, CPU subsystem, NoC, memory, and high-speed interface blocks. You will define and execute validation plans across pre- and post-silicon environments, create bare-metal test firmware, debug hardware and software issues, support performance optimization, and build automated CI/CD-integrated validation environments.
Requirements
- Experience in SoC, ASIC, silicon validation, or system validation
- Strong understanding of ARM architecture, AMBA bus, and SoC and computer architecture
- Embedded C, C++, and Rust programming capability, including bare-metal development experience
- Understanding and experience with validation methodologies including test planning, bug tracking, and coverage
- JTAG debugger and hardware/software co-debugging capability
- Problem-solving ability for complex system issues
Responsibilities
- Lead first-silicon bring-up and scenario-based functional validation for NPU, CPU subsystem, NoC, memory, and high-speed interface blocks
- Perform board bring-up and system initialization
- Define validation plans and manage coverage in pre-silicon and post-silicon environments
- Develop bare-metal test firmware and validation scenarios
- Debug system-level hardware and software issues using tools such as JTAG and Trace32
- Develop workarounds and report issues to relevant stakeholders
- Support NPU pipeline and memory-bandwidth performance validation and optimization
- Develop automation scripts and build CI/CD-integrated validation environments