Front End Design Verification Engineer
4 hours agoLeadSalary: 100K - 500KSanta Clara, California, United States; SpainRemoteEngineeringJobs by Tenstorrent
TenstorrentVisit Tenstorrent website
Tenstorrent is an AI-computing company that sells AI hardware and licenses AI and RISC-V intellectual property.
Toronto, Canada
Funding history
Investors
About Tenstorrent
Tenstorrent builds computers for AI, including AI processors, scalable server systems, and open-source software and compiler tooling. It also licenses AI and RISC-V IP for customers building customized silicon.
Skills
About the Role
You will verify the fetch unit for next-generation high-performance RISC-V CPU cores. You will develop verification strategies and tests, debug complex failures, and validate instruction fetch, prediction, decode, and dispatch across workloads and corner cases.
Requirements
- 6+ years of design-verification experience for CPUs, SoCs, ASICs, or complex digital designs
- SystemVerilog and UVM experience
- Constrained-random testing, assertions, functional coverage, and testbench-development experience
- Understanding of CPU architecture and pipelines
- Experience debugging RTL and simulation failures
- C, C++, or Python programming skills
Responsibilities
- Verify the CPU fetch unit and front-end logic
- Develop verification strategies and sophisticated tests
- Debug complex RTL and simulation failures
- Validate instruction fetch, prediction, decode, and dispatch behavior
- Partner with CPU architects, RTL designers, and verification engineers