Director, Silicon Verification

Skills

About the Role

You will help lead Graphcore's multi-site Silicon Verification organisation, defining verification strategies across multiple silicon programs. You will set direction for the verification lifecycle, including planning, infrastructure, execution, coverage closure, debug strategy and sign-off for complex, high-performance AI accelerators. You will partner closely with Architecture, Logical Design, Physical Design, DFT, Systems and Program Management teams to ensure accurate implementation, accelerated debug cycles, high coverage confidence and predictable silicon delivery. You will own verification planning, execution and sign-off for all RTL blocks and top-level SoCs, oversee test plans and coverage targets, direct debugging strategies and root-cause analysis, and steer integration of formal methods, simulation acceleration, emulation and system-level validation. You will deliver verification sign-off on schedule across parallel projects, guide risk management and resource planning, and drive metrics-based verification management.

Requirements

• Demonstrated ability to lead, scale and inspire high performing verification teams
• Extensive verification leadership experience within CPU, GPU, ASIC or SoC environments
• Deep understanding of modern verification methodologies, flows, and infrastructure
• Strong capability in SystemVerilog, Python, C++ and Linux-based workflows
• Expertise in diagnosing complex logic issues across RTL, testbench and system level domains
• Strong communication, collaboration and stakeholder management skills across global sites

Responsibilities

• Define the long-term vision, roadmap and strategy for silicon functional verification across all silicon programs
• Build, lead, and develop a high performing, globally distributed verification organisation
• Establish scalable methodologies, leading edge verification techniques, and best practice processes
• Drive automation, tooling and infrastructure evolution to improve productivity and verification quality
• Evaluate emerging tools and technologies and drive adoption to deliver competitive advantage
• Own verification planning, execution and sign-off for all RTL blocks and top-level SoCs
• Oversee definition of test plans including functional coverage targets and drive coverage signoff
• Direct debugging strategies, triage processes and root-cause analysis workflows
• Steer integration of verification technologies including formal methods, simulation acceleration/emulation and system level validation
• Ensure high quality feedback to other functions within the Silicon Team
• Partner with Architecture to influence and refine specifications for verifiability and risk reduction
• Collaborate with Logical Design to align on design intent, architectural corner cases and test scenarios
• Work closely with Physical Design and DFT teams to ensure coherent verification of interfaces, timing assumptions and test structures
• Lead post-silicon debug alignment, ensuring learning cycles feed back into RTL and verification methodology
• Deliver verification sign-off on schedule across multiple parallel projects
• Guide program risk management, resource planning, milestone creation, and verification budgeting
• Drive consistent metrics-based verification management
• Provide scheduled reports into program management on progress with associated metrics

Benefits

• Flexible working
• Generous annual leave policy
• Private medical insurance and health cash plan
• Dental plan
• Pension matched up to 5%
• Life assurance
• Income protection
• Generous parental leave policy
• Employee assistance programme including health, mental wellbeing, and bereavement support
• Healthy food and snacks at the Bristol office
• Barista bar