Design Verification Engineer – AI Accelerator Lead
Velaura AI develops ultra-low-power silicon and software technologies for AI compute infrastructure. Its solutions serve hyperscale data centers and Physical AI applications such as robotics, autonomous systems, drones, and edge devices.
Maintainer signals as of 8/23/2026
Funding history
About Velaura AI, Inc.
Velaura AI is an AI compute infrastructure company developing ultra-low-power silicon and software technologies. Its Titan Core™ platform uses proprietary digital chip IP, low-voltage libraries, EDA flows, and design methodologies to improve performance per watt in AI accelerators while maintaining performance, yield, and reliability. The company also applies this technology to Physical AI systems, including industrial robots, autonomous machines, drones, humanoids, and edge devices. Velaura engages hyperscalers, XPU companies, and developers of next-generation AI infrastructure and Physical AI solutions.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will own verification for custom AI acceleration units, including matrix and vector compute engines. You will translate microarchitecture into test and coverage plans, build portable verification environments, develop GEMM and GEMV reference models, verify numerical precision and accelerator data flow, measure performance, execute regressions, and support emulation and pre-silicon bring-up.
Requirements
- 8 or more years verifying high-performance compute or complex digital designs
- Understand LLMs including transformer structure and inference data flow
- Know GEMM and GEMV operations and their hardware mappings
- Have experience with SystemVerilog UVM C C++ assertions and coverage-driven verification
- Have experience building or using reference models in C C++ or Python
- Understand FP16 BF16 FP8 and INT8 numerical formats
- Own design verification from test planning through coverage closure and debug
- Hold a BS or higher in Computer Engineering Electrical Engineering or Computer Science
- Prior experience with LLM or neural-network models custom accelerators systolic arrays tensor cores PyTorch ONNX formal verification or silicon bring-up is preferred
Responsibilities
- Own verification of custom AI acceleration units including matrix and vector compute engines
- Translate microarchitecture intent into detailed test and coverage plans
- Build portable SystemVerilog and UVM verification environments with stimulus checkers assertions trackers and coverage
- Develop GEMM and GEMV reference models and compare hardware results against them
- Verify operand staging tiling accumulation and result writeback
- Verify precision rounding and quantization behavior
- Verify throughput latency utilization and performance per watt under representative workloads
- Execute regressions track bug and coverage metrics and support emulation and pre-silicon bring-up
Benefits
- Performance-based incentives
- Equity participation
- Medical coverage
- Dental coverage
- Vision coverage
- Paid time off
- Flexible work arrangements