Datacenter and Agentic AI Workload Performance Analysis Engineer
Tenstorrent is an AI-computing company that sells AI hardware and licenses AI and RISC-V intellectual property.
Maintainer signals as of 9/25/2026
Funding history
Investors
About Tenstorrent
Tenstorrent builds computers for AI, including AI processors, scalable server systems, and open-source software and compiler tooling. It also licenses AI and RISC-V IP for customers building customized silicon.
Skills
Candidate Availability
Required and preferred rules are kept separate and reflect the wording in the original posting.
About the Role
You will bring real-world applications to RISC-V platforms, characterize workload behavior, and identify performance, efficiency, and scalability opportunities. You will use profiling and simulation data to find bottlenecks, reduce production workloads for modeling, correlate simulation with hardware behavior, and translate findings into CPU architectural improvements.
Requirements
- PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field
- Experience in workload characterization, benchmark development, performance analysis, or simulation
- Deep understanding of CPU architecture and RISC-V
- Knowledge of pipelines, speculative execution, vector and SIMD extensions, memory hierarchies, and performance tradeoffs
- Experience with Linux perf, strace, QEMU, or CPU microarchitecture simulators
- Programming skills in C, C++, Python, Bash or Shell, and assembly or intrinsic programming
- Understanding of operating systems, virtualization, compilers, runtimes, and GNU or RISC-V software ecosystems
- Eligibility to access U.S. export-controlled technology
Responsibilities
- Characterize modern datacenter and agentic AI workloads on RISC-V platforms
- Use profiling and simulation data to identify performance bottlenecks
- Reduce production workloads for performance modeling and architectural exploration
- Correlate simulation results with hardware behavior
- Translate workload analysis into CPU architectural improvements