Distributed Systems Engineer, Multi-Chip Simulation

Skills

About the Role

You will build simulators for the host, links and protocols between chips so distributed software can be exercised before hardware exists. You will own the software architecture of the multi-chip simulation stack, model the communication fabric, compose simulators of different fidelity, scale from a few chips to full racks, and correlate against emulation and hardware.

Requirements

• 5+ years as a distributed systems engineer coordinating many machines or accelerators
• Strong understanding of distributed failure modes
• Experience debugging timing-dependent bugs using traces and logs
• Experience building simulators, emulators or test harnesses strongly preferred
• Sound judgment on fidelity versus run time
• Strong Rust skills or expert C/C++ with willingness to use Rust, and Python proficiency
• Excellent communication skills

Responsibilities

• Design and build simulators for host-to-chip and chip-to-chip layers
• Model the communication fabric including transfer timing, collectives, ordering, back-pressure, congestion and partial failure
• Own the architecture of the multi-chip simulation stack
• Compose simulators of different fidelity into one coherent simulation
• Scale simulation from a few chips to full racks while keeping runs fast for CI
• Correlate simulated behavior against emulation and hardware measurements with regression coverage

Benefits

• Fully company-paid medical, dental and vision insurance for you and dependents
• Company-paid life and disability coverage
• Supplemental hospital, critical illness and accident coverage available
• Unlimited paid time off
• 13 paid company holidays
• Remote-first culture with company-provided computer and home office setup
• Equity
• 401(k) with company matching from day one