CPU Verification Fellow RISC V High Performance Processor

Skills

About the Role

You will lead verification strategy and execution for high-performance RISC-V processors from early design through tapeout and post-silicon validation. You will define scalable verification methodology, build verification environments and coverage plans, verify complex CPU features, and mentor senior engineers across the verification organization.

Requirements

• Deep experience verifying high-performance superscalar CPUs, including out-of-order and speculative processors
• Knowledge of RISC-V architecture, ISA compliance, privileged architecture, virtual memory, atomics, vector extensions, and memory model behavior
• Proficiency in SystemVerilog, UVM, constrained-random verification, assertions, functional coverage, and debugging
• Experience with CPU reference models, instruction generators, ISS-based checking, or differential testing
• Expertise in formal verification and large-scale CPU verification environments
• Eligibility to access U.S. export-controlled technology

Responsibilities

• Lead verification strategy for RISC-V high-performance superscalar CPUs and subsystems
• Drive verification planning for out-of-order, speculative, and superscalar microarchitectures
• Build and scale test plans, coverage, checkers, assertions, scoreboards, and constrained-random environments
• Verify CPU frontend, branch prediction, execution, memory ordering, cache hierarchy, retirement, exceptions, interrupts, debug, and coherency features
• Partner with architecture, RTL, performance modeling, SoC, firmware, compiler, and validation teams
• Mentor senior engineers and establish CPU verification best practices