ASIC Validation Engineer
Radarblock is a Web3 native growth agency that helps protocols grow their audience. They position themselves as partners ('frens') rather than just a service provider, focusing on long-term relationships.
About Block, Inc.
Radarblock is a Web3 native growth agency that helps protocols connect with their audience. They position themselves as long-term partners ('frens') rather than just a service provider, with a focus on the DeFi space. Their process involves a 3-day plan starting with a discovery call, followed by strategy development and onboarding, and then execution. They also publish a newsletter with insights for Web3 CMOs.
Skills
About the Role
You will bridge the gap between custom mining silicon design and real world operation. In this highly hands on, lab focused role you will work closely with ASIC designers and system engineers to debug issues, build test infrastructure, and generate data to enable rapid design iteration and system level development. You will bring up silicon on bench platforms, evaluation boards, and system hardware. You will debug issues across ASIC, board, firmware, and system interactions. You will develop bench tests, scripts, and tools to exercise silicon features and collect data. You will build and maintain test setups (lab automation, instrumentation, fixtures, scripts). You will partner with ASIC designers to validate functionality and root-cause failures. You will work with system engineers to ensure silicon performs correctly in target system environments, including mining systems. You will generate and analyze data to support design decisions, characterization, and bring-up. You will create lightweight, reusable test workflows and documentation for the broader team. You will support early manufacturing efforts with practical validation and debug. Travel up to 20% to the labs in Oakland, CA or Toronto, Canada.
Requirements
- Bachelor's degree in Electrical Engineering or related field
- 4+ years of experience in silicon validation, hardware test, or related roles
- Strong hands-on experience in a lab environment (bench bring-up, debugging, instrumentation)
- Solid understanding of digital systems and basic analog concepts
- Experience writing scripts or tools (Python preferred) for test and data analysis
- Comfortable debugging issues that span multiple layers (ASIC ↔ board ↔ system)
- Clear communication skills and ability to work closely with cross-functional teams
- Experience with ASIC or FPGA bring-up and validation
- Familiarity with common interfaces (SPI, I2C, JTAG, UART, etc.)
- Experience using lab equipment (oscilloscopes, logic analyzers, power supplies, etc.)
- Exposure to high-performance, power-dense systems (e.g., mining ASICs, accelerators, or similar)
- Experience building test automation or internal tooling
- Familiarity with data analysis and visualization
- Nice to Have: Experience working with early silicon / first bring-up environments
- Exposure to manufacturing test or ATE
- Experience working on systems with tight power, thermal, and performance constraints
Responsibilities
- Bring up new silicon on bench platforms, evaluation boards, and system hardware
- Debug issues across ASIC, board, firmware, and system interactions
- Develop bench tests, scripts, and tools to exercise silicon features and collect data
- Build and maintain test setups (lab automation, instrumentation, fixtures, scripts)
- Partner with ASIC designers to validate functionality and root-cause failures
- Work with system engineers to ensure silicon performs correctly in target system environments, including mining systems
- Generate and analyze data to support design decisions, characterization, and bring-up
- Create lightweight, reusable test workflows and documentation for the broader team
- Support early manufacturing efforts with practical validation and debug
- Travel up to 20% to the labs in Oakland, CA or Toronto, Canada
Benefits
- Remote work
- Medical insurance
- Flexible time off
- Retirement savings plans
- Modern family planning